The present invention relates to a CRC calculation circuit, a semiconductor device, and a radar system. For example, the present invention relates to a CRC calculation circuit, a semiconductor device, and a radar system which perform CRC calculation.
A CRC (Cyclic Redundancy Check) system is widely used as an error detection system for data communication or the like in various systems. In the CRC system, a transmission side and a reception side perform CRC calculation using the same generator polynomial, thereby enabling error detection. The generator polynomial affects the error detection ability. Accordingly, various generator polynomials are employed depending on communication standards and requests from a system.
As related art, for example, Japanese Unexamined Patent Application Publication No. H07-095096 and Japanese Unexamined Patent Application Publication No. 2001-036414 are known.